NXP Semiconductors /LPC1102_04 /SYSCON /STARTERP0

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Interpret as STARTERP0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)ERPIO0_0 0RESERVED0 (DISABLED)ERPIO0_8 0 (DISABLED)ERPIO0_9 0 (DISABLED)ERPIO0_10 0 (DISABLED)ERPIO0_11 0 (DISABLED)ERPIO1_0 0RESERVED

ERPIO1_0=DISABLED, ERPIO0_8=DISABLED, ERPIO0_11=DISABLED, ERPIO0_0=DISABLED, ERPIO0_10=DISABLED, ERPIO0_9=DISABLED

Description

Start logic signal enable register 0

Fields

ERPIO0_0

Enable start signal for start logic input PIO0_0

0 (DISABLED): Disabled

1 (ENABLED): Enabled

RESERVED

Reserved

ERPIO0_8

Enable start signal for start logic input PIO0_8

0 (DISABLED): Disabled

1 (ENABLED): Enabled

ERPIO0_9

Enable start signal for start logic input PIO0_9

0 (DISABLED): Disabled

1 (ENABLED): Enabled

ERPIO0_10

Enable start signal for start logic input PIO0_10

0 (DISABLED): Disabled

1 (ENABLED): Enabled

ERPIO0_11

Enable start signal for start logic input PIO0_11

0 (DISABLED): Disabled

1 (ENABLED): Enabled

ERPIO1_0

Enable start signal for start logic input PIO1_0

0 (DISABLED): Disabled

1 (ENABLED): Enabled

RESERVED

Reserved. Do not set reserved bits in this register to one.

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